Some of the people in that 2005 discussion got it: 6502 is neither RISC nor CISC, it predates either concept. It's an impoverished instruction set, trying to g

Some of the people in that 2005 discussion got it: 6502 is neither RISC nor CISC, it predates either concept. It's an impoverished instruction set, trying to get the most utility possible out of a very limited number of transistors that you could fit on a chip at the time. Early mainframes (pre IBM 360) and minicomputers (DEC PDP-8, DG Nova) were designed under similar constraints and were similarly quirky and hard to use effectively. They also tended to have very poor code density which, combined with small memory sizes, made things such as bytecode interpreters and threaded code popular, despite the order of magnitude (or more) slowdown that imposed on already slow machines. It is interesting to contrast the 6502 with the earlier 6800 designed by many of the same people in their previous job. The 6800 is in fact much more RISC-like, with a very regular instruction set, and addressing modes no more complex than 16 bit index register plus 8 bit offset, which is very familiar to anyone working with modern ISAs such as RISC-V. The problem the 6800 has is that there is only one register that can be used as a pointer, which means something as simple as a memcpy or adding elements from two arrays together requires you to load the single index register from memory, use it to access the data, increment it (probably), and write it back to memory. All this taking 18 cycles and 7 bytes of code. And then do the same with the destination (or other source) pointer. The 6502 on the other hand uses its indirect addressing modes to allow you to directly work with up to 128 16 bit pointers stored in Zero Page. And if you're accessing the same elements in each array/string then you can use the Y register as an offset for all of them, and only have to INY to step between them -- and check for Y wrapping if the arrays are larger than 256 bytes. Loading a byte from one array, storing it to another, and bumping Y takes 5 bytes of code and 13-14 cycles in total on 6502, vs 14 bytes of code and 36 cycles on the 6800. Also the 6800's 2nd accumulator, B, gets very little use, and mostly as a loop counter which makes most of the instructions that can operate on it a waste of opcode space and silicon. The 6502 is really quite ugly and complex in comparison to the 6800, but it is much more effective in its use of code bytes, memory cycles, and transistors. The Z80 is amazingly very comparable overall to the 6502 in code density and use of memory cycles, despite a very different design, but uses twice as many transistors. The 8080 also uses more transistors than the 6502, while being quite a bit less effective than the Z80 or 6502.