Funnily enough, this has a fair amount of overlap with the embedded work I do these days: our architecture is thread-per-core (well, adjacent, as the vendor SDK

Funnily enough, this has a fair amount of overlap with the embedded work I do these days: our architecture is thread-per-core (well, adjacent, as the vendor SDK we build on has two other threads internally we can 't get rid of), data locality and latency matters, and so on. Looking forward to going through this in detail, even if my 368KB of RAM and SPI flash are quite a bit slower than your gigabytes and GB/s of NVMe flash! Specifically our device/firmware is very networking/IO and runtime-configurability focused, which makes for some fun challenges. Squeezing the most out of the microcontroller and peripherals has been important, and keeping data/code locality has helped lots.