Even the significantly smaller capacitance of some kind of CMOS input will appear as short for some amount of time. In combination with the series termination t

Even the significantly smaller capacitance of some kind of CMOS input will appear as short for some amount of time. In combination with the series termination this will low-pass filter the signal, which is (maybe somewhat counterintuitively) often desirable for high-speed logic (it reduces EMC issues and the effect of excessive power consumption due to reduced slew rate is mostly limited to the first input buffer on chip, which cleans the edges for subsequent circuitry. Within reason, obviously). When driving some kind of power MOSFET you want it to switch as fast as possible because of the power loss in the linear region.