2 ms·
I encountered NAND ECC about 10 years ago. We wanted to increase the size of the NAND flash on our embedded device (a data logger and gateway used to monitor an
by jdblair 3y ago
I encountered NAND ECC about 10 years ago. We wanted to increase the size of the NAND flash on our embedded device (a data logger and gateway used to monitor and control solar power systems). The larger NAND parts didn't have built in error correction. Enabling software error correction meant we had to move the kernel onto a small SPI-flash part.
This was all pretty straightforward, and probably increased reliability, but it introduced new complexity into our build, install and upgrade process, because now I had to take into account the different flash layout in otherwise almost identical devices.
Since then I learned it's much easier to use eMMC. You don't need software block management and wear leveling, you just read the specs and let the manufacturer handle everything for you.