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Over the past decade hardware complexity, and competitive pressure, has drastically increased. At the same time verification methodologies and tools have failed
by SubjectToChange 3y ago
Over the past decade hardware complexity, and competitive pressure, has drastically increased. At the same time verification methodologies and tools have failed to keep pace. This can even be seen in the steady increase of errata in Intel’s architecture manuals, and they are hardly alone in that respect.
- pgeorgi 3y agoThe problem is that Intel tries to "solve" security by adding new layers on top of the gargantuan mess of layers that already exists instead of reevaluating decisions made 30 years ago and dealing with compatibility issues through emulation.
- deleted 3y ago[deleted]
- SubjectToChange 3y agoWhat is this mess you are referring to? And what decisions made 30 years ago need to be reevaluated?
- simfree 3y agoShipping silicon changes takes 3 years minimum, though usually 4 to 5 years depending on where a chip is at in its design cycle. Asking silicon manufacturers to be nimble and respin chips already in the pipeline is not realistic given the huge lead times these vendors have to change their chips.
- deleted 3y ago[deleted]