That seems the most likely to me as well, since they also have a 16 bit selector field that has to be stored. The 286 already had 8 "segment registers" interna

That seems the most likely to me as well, since they also have a 16 bit selector field that has to be stored. The 286 already had 8 "segment registers" internally: ES, CS, SS, DS, GDT, LDT, IDT & TSS. Only the first four are directly accessible by the program, but to the microcode they should all be more or less identical. Besides the layout of the saved CPU state in memory, another clue to this is that for exceptions involving both "normal" and "system" segment registers, an error code gets stored in one of the internal registers, indicating which segment caused it. The only way to read it out in software is by executing the undocumented STOREALL instruction (F1 0F 04) immediately after the reset from a triple-fault shutdown. The codes that appear in this register are: 6CFFh GDT 6DFFh LDT 6EFFh IDT 6FFFh TSS 70FFh ES 73FFh DS CS and SS should be 71h / 72h, however exceptions involving these segments seem to take a different microcode path that overwrites that register with the access rights for CS. I have written about this here: https://rep-lodsb.mataroa.blog/blog/the-286s-internal-registers/ https://rep-lodsb.mataroa.blog/blog/the-286s-internal-regist... And this article shows the bus cycles done by LOADALL on the 386, note that it also loads 10 internal registers: http://www.rcollins.org/articles/loadall/tspec_a3_doc.html http://www.rcollins.org/articles/loadall/tspec_a3_doc.html