The hard part is not the "programming" part; it's boolean logic, if you understand how your machine works at the gate level, it makes sense as a kind of pseudo-

The hard part is not the "programming" part; it's boolean logic, if you understand how your machine works at the gate level, it makes sense as a kind of pseudo-declarative model of the bits of the machine. I found Verilog / SystemVerilog very intuitive and fun to work in. Not that I ever did it for a living, but it was entirely comprehensible to me after some practice. I went from newbie to wiring up my own simple video chip & character generator to a RISC-V core in a month or two. The hard parts are... a) the "fuzzy" bits -- timing, propagation delays, etc. the tool will warn you about it but it's not always easy to understand. It's easy to end up with a mess that makes perfect sense "logically" and works in your sim, etc. but actually only sorta works in meatspace. b) the tools. They all want to ram you into their shitty 1000lb IDEs which are forks of Eclipse from 15 years ago with a heaping dose of Tcl on the side and only work in some specific version of RedHat or whatever. Forget about using your preferred editor or IDE or build tool, they want to ram you through their GUI. You can sometimes route around it, by reverse engineering their Tcl and figuring out what command line invocations rae actually happening behind the heap of wizards they want to herd you through... but you'll always end up back in Quartus or whatever at some point. HW Engineers seem to be suckers for this kind of punishment.