4 ms·
That is pretty standard for LL/SC instructions -- you'll find similar constraints on the Arm equivalent insns. In practice this doesn't matter because you only
by pm215 3y ago
That is pretty standard for LL/SC instructions -- you'll find similar constraints on the Arm equivalent insns. In practice this doesn't matter because you only use them in a limited set of handcoded sequences to implement the atomic primitives you actually wanted, so you can always be sure that your LL/SC loop obeys the rules and makes forward progress.
- cmrdporcupine 3y agoWas going to say. x86 I think has spoiled people in terms of what they expect in terms of memory model / consistency. The answer is to be careful as a dev, and hopefully let the compiler and your libraries take care of the finer details.