3 ms·
Because the signal integrity across the pins and traces becomes a serious bottleneck. SODIMMs are already "past" the limit, requiring 1.35V for modest DDR5 spe
by brucethemoose2 3y ago
Because the signal integrity across the pins and traces becomes a serious bottleneck.
SODIMMs are already "past" the limit, requiring 1.35V for modest DDR5 speeds at terrible timings, hence vendors are trying to migrate to this:
https://www.anandtech.com/show/21069/modular-lpddr-becomes-a-reality-samsung-introduces-lpcamm-memory-modules https://www.anandtech.com/show/21069/modular-lpddr-becomes-a...
I suspect regular desktop/server DIMMs are getting close to their limit as well
Essentially, the closer the RAM sits to the CPU, the faster/lower latency/lower power it gets. This is especially important in graphics heavy chips, where the wide, high frequency busses can eat loads of power. In fact, I wouldn't be surprised if Apple transitions to something "new" like a newer generation of Samsung's Wide I/O if they can get memory vendors to produce it in bulk.