The SERDESs seem powerful. Maybe some of them are facing or can face the RISC-V cores. My main nag with Polarfire is lack of documentation enabling support on

The SERDESs seem powerful. Maybe some of them are facing or can face the RISC-V cores. My main nag with Polarfire is lack of documentation enabling support on the open stack (yosys+nextpnr). Ironically, we might end up with documentation and support obtained from reverse engineering the official tools and their databases and output. Such support is ironically very favorable to vendors that do not deserve it, e.g. iCE40 and Project iCEStorm, the first FPGA hardware supported, definitely popularized that specific FPGA architecture, which helped Lattice's sales.