5 ms·

CPU DB: Recording Microprocessor History

52 points by CowboyRobot 15y ago

frou_dh 15y ago
The other day I did a braindump of all the computers and handhelds I've owned so far, and their basic specs, before I forgot. I plan to maintain the list because it's fun to look back on :)
joe_bleau 15y ago
Note the relative energy/op for the Pentiums in figures 10 and 11.
- miahi 15y ago
  The Pentium architecture pops up from time to time (after the Netburst architecture Intel rolled back closer to the original Pentium architecture, and now Larrabee/MIC uses the same Pentium cores). At that time it was efficient because the memory clock was not very different from the CPU clock (6x-10x ratio) - the memory access did not cost a lot of CPU cycles, so the CPU had a decent performance without a big on-die cache. At higher clocks (more than 1GHz, ratio >10x) the Pentium architecture (Pentium III at that time) showed its age and had to be replaced (with the not-so-good Netburst). Right now the CPU/memory ratio is higher (20x and more), so the CPUs require big caches to compensate. The CPU cache has a huge transistor count, being SRAM (Static RAM, very low latency). Every SRAM bit is implemented with 6 transistors, so for 1MB of cache you need ~50 million transistors.
  - ableal 15y ago
    Another way of looking at it - which I believe was not covered in the article - is observing chip areas. If you look, top-of-the-line server chips (Xeons, etc.) pretty consistently hit 300 mm2. On the other hand, mid-range desktop chips usually are about 100 mm2. Besides marketing, pricing also has to do with process yield, which is not linear: 3x area is more than 3x more expensive. What to do with that area? Given the shrinkage that allows multiple CPU cores, the answer that gives best price-performance is cache, after the first 4 or 6 CPU cores ...
deleted 15y ago
[deleted]
DiabloD3 15y ago
I'd like to see a database that contains stuff like what C #defines are often used with it, what endian it is (or which OSes typically use which endian for those CPUs that are biendian), and the same for #defines for OSes.

52 points by CowboyRobot 15y ago

The other day I did a braindump of all the computers and handhelds I've owned so far, and their basic specs, before I forgot. I plan to maintain the list because it's fun to look back on :)

joe_bleau 15y ago

Note the relative energy/op for the Pentiums in figures 10 and 11.

miahi 15y ago
The Pentium architecture pops up from time to time (after the Netburst architecture Intel rolled back closer to the original Pentium architecture, and now Larrabee/MIC uses the same Pentium cores). At that time it was efficient because the memory clock was not very different from the CPU clock (6x-10x ratio) - the memory access did not cost a lot of CPU cycles, so the CPU had a decent performance without a big on-die cache. At higher clocks (more than 1GHz, ratio >10x) the Pentium architecture (Pentium III at that time) showed its age and had to be replaced (with the not-so-good Netburst). Right now the CPU/memory ratio is higher (20x and more), so the CPUs require big caches to compensate. The CPU cache has a huge transistor count, being SRAM (Static RAM, very low latency). Every SRAM bit is implemented with 6 transistors, so for 1MB of cache you need ~50 million transistors.
- ableal 15y ago
  Another way of looking at it - which I believe was not covered in the article - is observing chip areas. If you look, top-of-the-line server chips (Xeons, etc.) pretty consistently hit 300 mm2. On the other hand, mid-range desktop chips usually are about 100 mm2. Besides marketing, pricing also has to do with process yield, which is not linear: 3x area is more than 3x more expensive. What to do with that area? Given the shrinkage that allows multiple CPU cores, the answer that gives best price-performance is cache, after the first 4 or 6 CPU cores ...

deleted 15y ago

[deleted]

DiabloD3 15y ago

I'd like to see a database that contains stuff like what C #defines are often used with it, what endian it is (or which OSes typically use which endian for those CPUs that are biendian), and the same for #defines for OSes.