They aren't claiming A78 performance, they're claiming A78 performance/frequency. Since there are microarchitectural tradeoffs between frequency and IPC in ter

They aren't claiming A78 performance, they're claiming A78 performance/frequency. Since there are microarchitectural tradeoffs between frequency and IPC in terms of things like how many FO4s to use in pipeline stages these claims aren't as significant as they could be. If you have a super embedded system where your clock speed is tied to your memory frequency in a way where that's the limiting factor then performance/frequency can be a useful metic, but not in any system with caches.