4 ms·
I lost him when he said this: And RAM goes a lot deeper too. Look at these two sticks of RAM. See how the one on the right has twice the number of memory modul
by LastNevadan 3y ago
I lost him when he said this:
And RAM goes a lot deeper too. Look at these two sticks of RAM. See how the one on the right has twice the number of memory modules? That allows the individual stick of RAM to pump through data more quickly than the one on the left, even though both of them are rated at DDR 3200 and CL22.
The bus width is defined by the DIMM standard. A 64-bit DIMM (which is what he is showing) always has a 64-bit data interface, regardless of what devices are on the DIMM. The DIMM with fewer devices on it just has 16-bit-wide microchips on it. That doesn't have anything to do with the latency or clock speed of the chips themselves.
And it's strange that he calls each microchip a "module". I would call that a microchip or a device. A "module" is an assembly that contains multiple microchips.
I just get the vibe that he's someone skilled at putting systems together but doesn't have any real engineering background.
- redundantly 3y agoHe's referring to Rank Interleaving, and he's correct: https://frankdenneman.nl/2015/02/20/memory-deep-dive/#:~:text=1%2Dway%20rank%20interleaving%20results,a%20better%20improvement%20of%20latency https://frankdenneman.nl/2015/02/20/memory-deep-dive/#:~:tex.... You've put off the vibe of someone that assumes they're correct without double checking themselves ;)
- kcb 3y agoMemory rank has been a real factor for performance for a long time. For some reason the topic never got too much traction in the pc building/tech world. Probably because most people dismiss it because it does sound questionable at first thought.
- redundantly 3y agoFor most use cases it isn't noticeable to end users, especially your standard office worker or gamer. Even the highest end of gamers. Its really only a concern in the realm of ultra large memory applications: science, machine learning, HPC, etc