4 ms·

Well you can embed longer immediates directly in the opcode. You could have a lot more registers. The first example, I'm not sure you'd want a full 64bit enco

Well you can embed longer immediates directly in the opcode. You could have a lot more registers. The first example, I'm not sure you'd want a full 64bit encoding space. You still aren't going to be able to load a 64bit immediate directly so I'd rather see an instruction that uses the next instruction as the immediate. But then 50% of the time you're still going to be padding this to 64bit alignment, so it's unclear to me that this is a benefit over 2 lots of the same but with 32bit immediates. The second option is interesting. But if you've got 256 addressable registers say, what use are the 32 and 16 bit instructions that can only address a tiny proportion of those registers.

hajile 3y ago
The sweet spot for scalar code is about 24 registers, but that leads to weird offset-bits (there's an ISA that does this, but I forget what it's called), so 32 registers is easier to implement and provides a mild improvement in the long tail of atypical functions. On the flip side, the ability to have more registers is very good for SIMD/GPU applications.
- benj111 3y ago
  Absolutely, I'm not saying a 64bit instruction length with 5/6/7/8 bits of registers would be bad per se. In fact I'd be interested to see where it leads. But if you have a processor that also uses 16 bit instructions those extra registers become unusable. Thumb can't encode all registers in all instructions so you have the high registers that are significantly less useful than the low registers. X86 is the same, never really done 64bit ASM so I don't know if they improved that. So then you may aswell just divide up the registers so you've got 16 general purpose registers and 16 registers for simd or whatever.
Joker_vD 3y ago
How do you even use all those registers? Serious question. I've toyed with a couple of 256-register ISAs, and the moment you hit function calls/parameter passing you realize that to utilize those efficiently, you really need some way to indirectly refer to registers, be it register windows, or MMIX's register slide, or Am29k's IPA/IPB/IPC registers; the only other option seems to be to perform global register allocation but that hardly works in scenarios with separate compilation/dynamic code loading.
- benj111 3y ago
  Off the top of my head I don't really know. But then if you had asked me 20 years ago if we'd need multi core multi GHz multi GB computers to display a web page I'd probably have said no. I suppose the os could reserve registers for itself to save swapping in and out quite so often. Register windows for applications/functions/threads. Or maybe something radically different, like get rid of the stack, and treat them conceptually like a list?
- _a_a_a_ 3y ago
  > I've toyed with a couple of 256-register ISAs, and the moment you hit function calls/parameter passing you realize that to utilize those efficiently Very revealing, thanks, this had never occurred to me

hajile 3y ago

The sweet spot for scalar code is about 24 registers, but that leads to weird offset-bits (there's an ISA that does this, but I forget what it's called), so 32 registers is easier to implement and provides a mild improvement in the long tail of atypical functions. On the flip side, the ability to have more registers is very good for SIMD/GPU applications.

benj111 3y ago
Absolutely, I'm not saying a 64bit instruction length with 5/6/7/8 bits of registers would be bad per se. In fact I'd be interested to see where it leads. But if you have a processor that also uses 16 bit instructions those extra registers become unusable. Thumb can't encode all registers in all instructions so you have the high registers that are significantly less useful than the low registers. X86 is the same, never really done 64bit ASM so I don't know if they improved that. So then you may aswell just divide up the registers so you've got 16 general purpose registers and 16 registers for simd or whatever.

Joker_vD 3y ago

How do you even use all those registers? Serious question. I've toyed with a couple of 256-register ISAs, and the moment you hit function calls/parameter passing you realize that to utilize those efficiently, you really need some way to indirectly refer to registers, be it register windows, or MMIX's register slide, or Am29k's IPA/IPB/IPC registers; the only other option seems to be to perform global register allocation but that hardly works in scenarios with separate compilation/dynamic code loading.

benj111 3y ago
Off the top of my head I don't really know. But then if you had asked me 20 years ago if we'd need multi core multi GHz multi GB computers to display a web page I'd probably have said no. I suppose the os could reserve registers for itself to save swapping in and out quite so often. Register windows for applications/functions/threads. Or maybe something radically different, like get rid of the stack, and treat them conceptually like a list?
_a_a_a_ 3y ago
> I've toyed with a couple of 256-register ISAs, and the moment you hit function calls/parameter passing you realize that to utilize those efficiently Very revealing, thanks, this had never occurred to me