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I mentioned it elsewhere but a big draw is FPGA soft cores or others forms of embedded CPU stuff. ARM licensing terms are bonkers so riscv has a major advantag
by edrxty 3y ago
I mentioned it elsewhere but a big draw is FPGA soft cores or others forms of embedded CPU stuff. ARM licensing terms are bonkers so riscv has a major advantage if you need something better than a NIOS II or Microblaze (soft cores that Intel and Xilinx provide respectively).
- galangalalgol 3y agowith so mych of xilinx' lineup having hard arm cores built in, what is the driver for soft cores?
- edrxty 3y agoFlying radiation hardened FPGAs is a big one. Just because a chip exists doesn't mean it's usable for any given application.
- tverbeure 3y agoEase of use. The area of a small soft core is trivial. And having a small CPU core all for yourself and dedicated to manage one piece of hardware without having to deal with an operating system and other processes interfering is incredibly convenient. See my other comment.
- notacoward 3y agoI worked at a company that designed whole systems from chips on up. I thought it was odd that they chose MIPS as a base architecture, until someone explained that the alternatives all had far higher licensing costs. IP licensing for other parts of the chip was already their second biggest cost after payroll, so I guess that made sense.
- ilyt 3y agoI feel like it will converge to just having RV + FPGA chips rather than people wasting precious FPGA space on softcores. Zynq's are plenty popular already
- edrxty 3y agoEasier said than done. Lots of Zynqs on orbit and elsewhere right now but if you want to do anything at all custom you're stuck with soft cores because regardless of who you are, I know for sure you don't have the money to do a custom chip.
- tverbeure 3y agoIt's common to have high performance CPU cores for the main tasks yet still have small microcontroller cores sprinkled all over the place for specific sub-block management, even in FPGAs. For example, a small 5-stage pipelined VexRiscv CPU take around 2000 logic elements. That's nothing in today's large FPGAs. Add, say, 4KB of RAM and put it right next to the complex HW core that you want to manage and you have the equivalent of a complex FSM that's programmable without any worries about having to share cycles with other processes and missing out events with hard real-time requirements. It's done all the time, and it's great.
- tails4e 3y agoThe latest microblaze is already RISC-V under the hood, but of course other vendors can be used too.