3 ms·
Related to all of the people who've already sunk a bunch of work in to this; the official lore/backstory says that the whole premise was instigated by a Big/Lit
by dljsjr 15y ago
Related to all of the people who've already sunk a bunch of work in to this; the official lore/backstory says that the whole premise was instigated by a Big/Little Endian mixup, and that the DCPU is supposed to be Little Endian...
But from Notch's spec document:
"Instructions are 1-3 words long and are fully defined by the first word.
In a basic instruction, the lower four bits of the first word of the instruction are the opcode,
and the remaining twelve bits are split into two six bit values, called a and b.
a is always handled by the processor before b, and is the lower six bits.
In bits (with the least significant being last), a basic instruction has the format: bbbbbbaaaaaaoooo"
In other words, the current DCPU spec is Big Endian. So I wonder if Notch will be rewriting the spec, even though from all accounts it seems that he's already implemented the emulator.
- idupree 15y agoThe spec example For example, to do a 32 bit add of 0x12345678 and 0xaabbccdd, do this: SET [0x1000], 0x5678 ; low word SET [0x1001], 0x1234 ; high word suggests he's thinking in little-endian. I don't think it's relevant to this spec though: there's no way for a DCPU program to detect the CPU's endianness. Imagine it's C with 16-bit "char"s and no larger int sizes.
- etcet 15y agoIt'd be funny to see the first programs running in the game to make the same mistake. Maybe the inconsistency in notch's spec is purposeful.
- TazeTSchnitzel 15y agolittle endian words, big endian instructions?
- hetman 15y agoEndianness doesn't really mean anything in the context of a single word (except maybe on serial lines). What made you conclude the above suggests big endian?