3 ms·
plus out of order execution, hyperthreading, SIMD, better and bigger memory caches, more cores, more power efficiency
by drdrey 3y ago
plus out of order execution, hyperthreading, SIMD, better and bigger memory caches, more cores, more power efficiency
- nxobject 3y agoIn the spirit of increasingly large memory caches, don't forget other increasingly large microarchitectural buffers (e.g. reorder/retire buffer), and the hella microarchitectural parallelism that it enables. Apple went all in on this strategy, and it paid off.