My understanding is that COVID happened and schedules slipped, and as a result they decided to licence some IP blocks from Synopsys (like a DDR4/5 PHY and a PCI

My understanding is that COVID happened and schedules slipped, and as a result they decided to licence some IP blocks from Synopsys (like a DDR4/5 PHY and a PCIe 5.0 PHY). Synopsys likes including control MCUs in their IP (yes, their DDR PHY has a MCU in it) which are intended to run a binary blob provided by them, and for which they will not give you the source code. For those curious, it's the same DDR PHY blob needed for memory bringup used by the i.MX8M and products based on it (e.g. Librem 5). Basically IBM facing delays chose to use the IP of Synopsys rather than make their own DDR5 and PCIe5 IP as they usually would (the fact they traditionally made all their own stuff is one of the reasons they were in the position to open 100% of the firmware of POWER9 in the first place), and dropped the ball on making sure that would meet the 100% open source firmware requirements of Raptor's customers. IBM walled themself into a corner here, as they're now dependent on Synopsys IP and it's not like they can persuade Synopsys to open their ahem precious IP. See my article (it was a hypothetical but has now been confirmed): https://www.devever.net/~hl/omi https://www.devever.net/~hl/omi (Of course the DDR PHY is on the OMI chip not the CPU, but with only one supplier of the required OMI chips this is a moot point. The PCIe5 PHY is on the CPU though and also needs a blob.)