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Not really where OP was headed, but... I would say RISC-V is still unmature in some areas. ARM is far more than ISA, for example the interrupt controller in a

Not really where OP was headed, but... I would say RISC-V is still unmature in some areas. ARM is far more than ISA, for example the interrupt controller in a modern ARM SoC is more complex than a RISC-V core. Can anyone provide a viable RISC-V alternative with proper Linux support soon? Another issue is performance. We simply don't know how RISC-V performs compared to latest ARMs.

rickdeckard 3y ago
That's why I believe it's a smart move to start with Android Wear as target-platform. It narrows the scope to less I/O, smaller screen-resolutions, lower cost, no cellular modem, yet still the same OS-architecture and moderate/high sales-volume. Good target to ramp up a new platform...
snvzz 3y ago
>for example the interrupt controller in a modern ARM SoC is more complex than a RISC-V core. RISC-V has the AIA[0], a pretty good interrupt controller. It is a requirement in the platform spec. https://github.com/riscv/riscv-aia https://github.com/riscv/riscv-aia