4 ms·
> One example of this is branch delay slots That's the only example I'm aware of. Are there others? (I'm sure you could do it poorly if you wanted to, but how
by dataflow 3y ago
> One example of this is branch delay slots
That's the only example I'm aware of. Are there others? (I'm sure you could do it poorly if you wanted to, but how much history is there to extrapolate from?)
- JonChesterfield 3y agoI'm unimpressed that x64 assumes function calls write the return address to stack memory instead of passing it in a register. It means you have to use the stack memory in order to benefit from the call/ret prediction hardware, even in functions which don't otherwise need to allocate any stack memory. In general leaking microarch weirdness matters less if you don't have backwards compatibility.
- fanf2 3y agoVector instruction sets expose too much about the size of the CPU. They have got bigger over the years, 128 - 256 - 512 bits, 8 - 16 - 32 registers, and now Intel is struggling to fit them comfortably into their small efficiency cores and retain binary compatibility with their big performance cores.