4 ms·
The previous BeagleBoards also have a nice setup with a pair of PRU's (Programmable Realtime Units) that share memory with the main CPU. These MCU-like PRUs we
by tyingq 3y ago
The previous BeagleBoards also have a nice setup with a pair of PRU's (Programmable Realtime Units) that share memory with the main CPU. These MCU-like PRUs were leveraged in a lot of projects that needed external IO with low latency and high clock affinity, like audio processing, driving LED arrays, etc.
This Risc-V Beagleboard doesn't have anything like that. There are some entities in the space that are working towards that though...LowRisc.org has a concept of "Minion Cores".
- dragontamer 3y agoThe AM3558 (aka: Beaglebone Black/Green chip) looks like it is barely on the cusp of "doable" in KiCAD, though probably with some significant effort. Its an older chip but the fact that its ready to be laid out by an advanced hobbyist is very intriguing to me. That being said: the latest chips from TI have significant improvements. PRUs always were wonky programs that were hard to grok. The more recent AM625 keeps the PRU for backwards compatibility (and buffs it up a bit), but IMO the on-board 400 MHz realtime Cortex-M4F is the more "obvious" realtime processor to use. Quad-Core Cortex-A53 should be plenty for most hobbyists as well. Upgrading to DDR4 / LPDDR4 means tighter tolerances however, and the 441-pin (aka: 21x21 pins) AM625 probably needs 8-layers and maybe blind vias... while the older AM3558 (Beaglebone Black) can use DDR2 with much looser tolerances and only has 324 pins (aka 18x18). So 6-layers seems possible to me, maybe with a few pins disconnected.