5 ms·

Author here. I've been looking at the 386 if anyone has questions. This post was inspired by userbinator's discussion on HN a couple of weeks ago about how many

by kens 3y ago

Author here. I've been looking at the 386 if anyone has questions. This post was inspired by userbinator's discussion on HN a couple of weeks ago about how many transistors there are in the 386.

deleted 3y ago
[deleted]
colejohnson66 3y ago
Love the post! Some DOI and Bitsavers links are broken (linking to righto.com or 404s). Also, where can I find "Automatic Place and Route Used on the 80386"? DDG only contains one result: this post.
- chasil 3y ago
  There was some discussion of the automatic placement in this panel interview. If I remember correctly, the software that performed the placement was written by a graduate student who debugged it from a terminal at his dormitory. It was one of many project decisions on the i386 that management would have absolutely stopped had they been made aware. https://www.computerhistory.org/collections/catalog/102702019 https://www.computerhistory.org/collections/catalog/10270201... "386 is a complicated processor (by 1980s standards), with 285,000 transistors..." Interesting that ARM1 was only 25,000 transistors. Did the i386 really have additional features that justify an order of magnitude? One thing is certain in retrospect: Intel should have bought Acorn, not Olivetti. Edit: Wow, there is even more detail on the placement software in the Righto article; the software was "Timberwolf" written by Dr. Carl Sechen. Edit2: It appears that later versions of Timberwolf were sucked into Yale's licensing. ...Sechen served as an expert witness in the Cadence/Avanti trial in 2000 and 2001... "I had a chance to examine a great deal of the code in question when I was an expert witness on the trial. It was amazing – I even saw my own TimberWolf code in their tool, where only a single line of code had been changed. And I don’t mean the earlier, far-inferior version of TimberWolf available from Berkeley. The version I found in Avanti’s suite was a far more state-of-the-art version that had somehow been ‘acquired’ from Yale." http://www.aycinena.com/index2/index3/archive/uw%20-%20sechen.html http://www.aycinena.com/index2/index3/archive/uw%20-%20seche... Edit3: Graywolf is a fork of the last free version of Yale's Timberwolf. https://github.com/rubund/graywolf https://github.com/rubund/graywolf
  - Someone 3y ago
    > Did the i386 really have additional features Here are a few: - > 26 bit address space - multiplication in hardware - more complex instructions - backwards compatibility with the 80286 - on-chip MMU - support for a FPU > that justify an order of magnitude? I wouldn’t know. Backwards compatibility certainly is high on the list because, when it was released, many users had fairly high investments in commercial software.
    - snvzz 3y ago
      > - backwards compatibility with the 80286 With the 8086, sure. v86 got you covered. With 80286? Not really. It might have some of the instructions, but it does not support 286's protected mode.
    - chasil 3y ago
      Well, 26 bits would have made the 80286 a king. Would that itself have killed ARM? Of course, SSE/NEON was decades in the future. As we note, Intel did not value backwards compatibility at the outset of the i386. Perhaps an Acorn acquisition and the sudden ownership of a low-power CPU that they could make for peanuts might have also had a profound impact. It would have been interesting to see Intel making BBC Micros.
  - fsckboy 3y ago
    >interesting that ARM1 was only 25,000 transistors. Did the i386 really have additional features that justify an order of magnitude? you're asking somebody to answer RISC vs CISC in a subthread? there's not simple answer to that question, but the x86 family had a leg up with MSWindows compatibility and the processors they developed maintained that hegemony till they went astray with Itanium and were saved by amd64
  - lizknope 3y ago
    I've been in physical design since 1997. Back then we were using Cadence Gate / Silicon Ensemble. We tried the various Avanti tools. Aquarius, Astro, Apollo. I don't remember the exact order but all the space theme names are where the MilkyWay database comes from that is still in Synopsys IC Compiler. I remember that when the court actually compared the source code they found that some of the comments had the same words misspelled in the same way. Two programmers may pick the same variable names but they aren't going to misspell words the same way in comments unless it was stolen code.
- kens 3y ago
  Thanks! I've fixed the links, so let me know if you see any other broken ones. The "Automatic Place and Route Used on the 80386" article is from Intel Technology Journal, Spring 1986, p29-34. I don't think you can find it anywhere; Pat Gelsinger sent me a copy. Email me (ken.shirriff@gmail.com) and I'll send it to you.
  - pbjtime 3y ago
    You can always upload it to Archive.org if you feel so inclined
Waterluvian 3y ago
Total amateur here: does a 386 have “cleverness” or optimizations or does it just quite literally chug through a stream of instructions, adjusting registers and memory? I guess by this I am thinking about how newer processors do all kinds of stuff at the microcode level that mean you cannot anticipate precisely what instructions are being executed in what order.
- bonzini 3y ago
  Out of order execution was introduced in the Pentium Pro, the Pentium was already able to execute two instructions per cycle but was still in-order. Note that this "magic" is mostly implemented not in microcode, but rather in hardwired logic.
- kens 3y ago
  Well, yes and no. The 386 is chugging through the stream of instructions sequentially, unlike modern processors. There are various clever optimizations, though. First, there is some pipelining, so the microcode for the next instruction can execute while the previous one is finishing. Second, the CPU has 16 bytes of prefetching, so instructions are fetched from memory asynchronously from their execution. So you know what instructions are executed and in what order, but the timing is fairly unpredictable. I should mention that microcode in the 386 is pretty different from micro-ops that modern processors run. They both break machine instructions down into smaller steps. But microcode runs sequentially, while micro-ops are sort of tossed into the CPU and run independently through a dataflow engine, with everything sorted out at the end to look sequential. Confusingly, modern processors use "microcode" to hold the micro-ops for complicated instructions that can't be handled by the regular instruction decoder; this is sort of like old-style microcode, but not exactly.
  - nxobject 3y ago
    That's really cool: having learned most of my digital design from an era where interpreted microcode was the norm, and the PDP-11 or early 68k was the pinnacle of hardware design worth teaching, I've always wanted to learn about the transitional designs from old-style microcode, to how shrunk forms of microcoding lived in superscalar CISC designs. (I'm still trying for lack of resources.)
twoodfin 3y ago
Great post. The most interesting thing to me was how historically significant the 386SL turned out to be. I had always mentally slotted it as a cheap cut-down part for the emerging laptop market, but it actually was a relatively sophisticated (3X the transistors!) precursor of the modern SoC.
- rasz 3y ago
  Level of integration wasnt the thing that made 386SL special, there were 8088/8086 SoCs before it like NEC V40 used in 1987 Zenith Eazy PC or V50 in 1988 Akai S1000 https://en.wikipedia.org/wiki/NEC_V20#Variants_and_successors https://en.wikipedia.org/wiki/NEC_V20#Variants_and_successor... What made 386SL special was introduction of System Management Mode (SMM). Intel sued AMD over Am386 SMM implementation, AMD tried claiming its not really SMM but jut some left over debugging ICE implementation :D https://ir.amd.com/sec-filings/content/0000898430-94-000804/EX-99_1.txt https://ir.amd.com/sec-filings/content/0000898430-94-000804/...
monocasa 3y ago
About what rough area percentage (or some other metric if you think there's a clearer comparison) of a 386DX is standard cells versus hand layout?
- kens 3y ago
  Looking at the die, I'd say roughly 1/3 of the die is standard cell. I think some of it was standard cell but with hand layout, rather than automatic place and route. About 1/4 is the datapath, which is highly optimized. Maybe 10% is the microcode ROM.
johnklos 3y ago
Every time I see something new on righto.com, I get excited! I get to learn :D Thank you so much, both for constantly sharing what you know and for preserving what's one of the most interesting times in the evolution of computing.
- RetroTechie 3y ago
  +1 What I like most about these articles, is that it shows how messy even high-tech can be: All the details in fabrication techniques (and its effect on what logic designers can/can't do), some opcodes removed to make room on the die for a bugfix (?, see note 26), etc etc. "Ultimately all digital electronics is analog". The business mistakes, and lucky recoveries. Keep up the good work, Ken! (btw you typo'd an "8" and "6" in note 25 :-)
srejk 3y ago
Great post! Any idea how the turbo button worked? It seems like, given the transistor difference between the 8086 and 386, that merely decreasing the clock frequency wouldn't be enough?
- kens 3y ago
  Yes, I think the turbo button just changes the clock speed. The 386 was designed to be binary compatible with the 8086, but normally ran faster.
- irdc 3y ago
  This was often done by introducing wait states, so the processor would slow down while accessing main memory.
  - sounds 3y ago
    I did some sleuthing to try to figure out what part of computing history this could refer to. - Maybe because one could lower the "wait states" BIOS setting on PCs, and this became a selling point and was marketed? https://retrocomputing.stackexchange.com/questions/9779 https://retrocomputing.stackexchange.com/questions/9779 https://retrocomputing.stackexchange.com/questions/18333 https://retrocomputing.stackexchange.com/questions/18333 Note: it is often perceived that the CPU with more "wait states" was slower. But the above links point out how often the opposite is true. - The Apple II era was a very different world. The CPU was relatively slower than the RAM. https://retrocomputing.stackexchange.com/questions/23541 https://retrocomputing.stackexchange.com/questions/23541
- fsckboy 3y ago
  the lack-of-turbo button was included to enhance compatibility with older software that using timing tricks that relied on the clockspeeds of the older generations of processors. Those older processors would not have used the enhanced features of the new processors, just the backward compatible features. Turbo was a motherboard OEM feature, not a 386 feature. Otherwise, there was no reason not to run "turbo"
- rasz 3y ago
Stratoscope 3y ago
Great article as always! One nit: > ..."tapeout", when the chip data is sent on magnetic tape to the mask fabrication company. That's roughly true in a temporal sense, but it's not where the term "tapeout" comes from. They could have shipped the data on a Winchester disk, and the event would still be called tapeout. In the earlier days of printed circuit board (PCB) manufacturing, you would literally "tape out" your circuit manually with black tape on a white board, typically in an enlarged form. "Tapeout" came to mean the point in time when you finished taping out your circuit and it was ready to be sent to be photographed and reduced and boards manufactured from the layout. There wasn't even any "data" involved here, magnetic or otherwise. Just a physical art board with tape on it. Wikipedia has a pretty good article on this: https://en.wikipedia.org/wiki/Tape-out https://en.wikipedia.org/wiki/Tape-out And for the young'uns who are wondering "what the heck is a Winchester disk?" https://www.pcmag.com/encyclopedia/term/winchester-disk https://www.pcmag.com/encyclopedia/term/winchester-disk I taped out my first printed circuit board as a third-grader sometime around 1960 and shared the story here: https://news.ycombinator.com/item?id=32116169 https://news.ycombinator.com/item?id=32116169
userbinator 3y ago
Thanks for getting to the bottom of the doubt! The SL die photo seems to really show the differences in density that careful layout can produce; one wouldn't think that bus/memory controllers are of the same complexity as the CPU itself, but due to being entirely standard cells, they are almost the same size as the CPU.
rasz 3y ago
Sadly Computerworld 'Intel backs off 80386 claims but denies chip recast needed (1986)' article was devoid of technical details :( Do you have more detailed information about what were the main issues with multiple OSes in Protected Mode? Was it implementation bug or fundamental architectural problems? Do you know by any chance why did Intel miss POPF trap in Protected Mode? https://devblogs.microsoft.com/oldnewthing/20160411-00/?p=93281 https://devblogs.microsoft.com/oldnewthing/20160411-00/?p=93... https://docs.oracle.com/en/virtualization/virtualbox/6.0/admin/swvirt-details.html https://docs.oracle.com/en/virtualization/virtualbox/6.0/adm... https://www.felixcloutier.com/x86/popf:popfd:popfq https://www.felixcloutier.com/x86/popf:popfd:popfq Pentium Virtual Mode Extension (VME) and its Protected Mode Virtual Interrupts (PVI) solve performance burden of trapping, but despite being named _Protected Mode_ Virtual Interrupts this works only in V86 mode leaving Protected with this bug: "The protected-mode virtual-interrupt feature — enabled by setting CR4.PVI — affects the CLI and STI instructions in the same manner as the virtual-8086 mode extensions. POPF, however, is not affected by CR4.PVI" They even planned to patent PVI this in ~1992 https://patents.google.com/patent/GB2259794A/en https://patents.google.com/patent/GB2259794A/en and clearly knew about popf pitfalls back then. Could this be what people in Computerworld article were complaining about? I dont understand how Intel not fixed it at all to this day. Btw I find it funny and weird that Intel was lawyering around all the way in 1998 trying to suppress any knowledge of Virtual Mode Extension! Dr. Dobb's 'VME: Coming Out of the Cold' https://web.archive.org/web/20001217233100/http://www.rcollins.org/ddj/May98/May98.html https://web.archive.org/web/20001217233100/http://www.rcolli...

by kens 3y ago

Author here. I've been looking at the 386 if anyone has questions. This post was inspired by userbinator's discussion on HN a couple of weeks ago about how many transistors there are in the 386.

deleted 3y ago

[deleted]

colejohnson66 3y ago

Love the post! Some DOI and Bitsavers links are broken (linking to righto.com or 404s). Also, where can I find "Automatic Place and Route Used on the 80386"? DDG only contains one result: this post.

chasil 3y ago
There was some discussion of the automatic placement in this panel interview. If I remember correctly, the software that performed the placement was written by a graduate student who debugged it from a terminal at his dormitory. It was one of many project decisions on the i386 that management would have absolutely stopped had they been made aware. https://www.computerhistory.org/collections/catalog/102702019 https://www.computerhistory.org/collections/catalog/10270201... "386 is a complicated processor (by 1980s standards), with 285,000 transistors..." Interesting that ARM1 was only 25,000 transistors. Did the i386 really have additional features that justify an order of magnitude? One thing is certain in retrospect: Intel should have bought Acorn, not Olivetti. Edit: Wow, there is even more detail on the placement software in the Righto article; the software was "Timberwolf" written by Dr. Carl Sechen. Edit2: It appears that later versions of Timberwolf were sucked into Yale's licensing. ...Sechen served as an expert witness in the Cadence/Avanti trial in 2000 and 2001... "I had a chance to examine a great deal of the code in question when I was an expert witness on the trial. It was amazing – I even saw my own TimberWolf code in their tool, where only a single line of code had been changed. And I don’t mean the earlier, far-inferior version of TimberWolf available from Berkeley. The version I found in Avanti’s suite was a far more state-of-the-art version that had somehow been ‘acquired’ from Yale." http://www.aycinena.com/index2/index3/archive/uw%20-%20sechen.html http://www.aycinena.com/index2/index3/archive/uw%20-%20seche... Edit3: Graywolf is a fork of the last free version of Yale's Timberwolf. https://github.com/rubund/graywolf https://github.com/rubund/graywolf
- Someone 3y ago
  > Did the i386 really have additional features Here are a few: - > 26 bit address space - multiplication in hardware - more complex instructions - backwards compatibility with the 80286 - on-chip MMU - support for a FPU > that justify an order of magnitude? I wouldn’t know. Backwards compatibility certainly is high on the list because, when it was released, many users had fairly high investments in commercial software.
  - snvzz 3y ago
    > - backwards compatibility with the 80286 With the 8086, sure. v86 got you covered. With 80286? Not really. It might have some of the instructions, but it does not support 286's protected mode.
  - chasil 3y ago
    Well, 26 bits would have made the 80286 a king. Would that itself have killed ARM? Of course, SSE/NEON was decades in the future. As we note, Intel did not value backwards compatibility at the outset of the i386. Perhaps an Acorn acquisition and the sudden ownership of a low-power CPU that they could make for peanuts might have also had a profound impact. It would have been interesting to see Intel making BBC Micros.
- fsckboy 3y ago
  >interesting that ARM1 was only 25,000 transistors. Did the i386 really have additional features that justify an order of magnitude? you're asking somebody to answer RISC vs CISC in a subthread? there's not simple answer to that question, but the x86 family had a leg up with MSWindows compatibility and the processors they developed maintained that hegemony till they went astray with Itanium and were saved by amd64
- lizknope 3y ago
  I've been in physical design since 1997. Back then we were using Cadence Gate / Silicon Ensemble. We tried the various Avanti tools. Aquarius, Astro, Apollo. I don't remember the exact order but all the space theme names are where the MilkyWay database comes from that is still in Synopsys IC Compiler. I remember that when the court actually compared the source code they found that some of the comments had the same words misspelled in the same way. Two programmers may pick the same variable names but they aren't going to misspell words the same way in comments unless it was stolen code.
kens 3y ago
Thanks! I've fixed the links, so let me know if you see any other broken ones. The "Automatic Place and Route Used on the 80386" article is from Intel Technology Journal, Spring 1986, p29-34. I don't think you can find it anywhere; Pat Gelsinger sent me a copy. Email me (ken.shirriff@gmail.com) and I'll send it to you.
- pbjtime 3y ago
  You can always upload it to Archive.org if you feel so inclined

Waterluvian 3y ago

Total amateur here: does a 386 have “cleverness” or optimizations or does it just quite literally chug through a stream of instructions, adjusting registers and memory? I guess by this I am thinking about how newer processors do all kinds of stuff at the microcode level that mean you cannot anticipate precisely what instructions are being executed in what order.

bonzini 3y ago
Out of order execution was introduced in the Pentium Pro, the Pentium was already able to execute two instructions per cycle but was still in-order. Note that this "magic" is mostly implemented not in microcode, but rather in hardwired logic.
kens 3y ago
Well, yes and no. The 386 is chugging through the stream of instructions sequentially, unlike modern processors. There are various clever optimizations, though. First, there is some pipelining, so the microcode for the next instruction can execute while the previous one is finishing. Second, the CPU has 16 bytes of prefetching, so instructions are fetched from memory asynchronously from their execution. So you know what instructions are executed and in what order, but the timing is fairly unpredictable. I should mention that microcode in the 386 is pretty different from micro-ops that modern processors run. They both break machine instructions down into smaller steps. But microcode runs sequentially, while micro-ops are sort of tossed into the CPU and run independently through a dataflow engine, with everything sorted out at the end to look sequential. Confusingly, modern processors use "microcode" to hold the micro-ops for complicated instructions that can't be handled by the regular instruction decoder; this is sort of like old-style microcode, but not exactly.
- nxobject 3y ago
  That's really cool: having learned most of my digital design from an era where interpreted microcode was the norm, and the PDP-11 or early 68k was the pinnacle of hardware design worth teaching, I've always wanted to learn about the transitional designs from old-style microcode, to how shrunk forms of microcoding lived in superscalar CISC designs. (I'm still trying for lack of resources.)

twoodfin 3y ago

Great post. The most interesting thing to me was how historically significant the 386SL turned out to be. I had always mentally slotted it as a cheap cut-down part for the emerging laptop market, but it actually was a relatively sophisticated (3X the transistors!) precursor of the modern SoC.

rasz 3y ago
Level of integration wasnt the thing that made 386SL special, there were 8088/8086 SoCs before it like NEC V40 used in 1987 Zenith Eazy PC or V50 in 1988 Akai S1000 https://en.wikipedia.org/wiki/NEC_V20#Variants_and_successors https://en.wikipedia.org/wiki/NEC_V20#Variants_and_successor... What made 386SL special was introduction of System Management Mode (SMM). Intel sued AMD over Am386 SMM implementation, AMD tried claiming its not really SMM but jut some left over debugging ICE implementation :D https://ir.amd.com/sec-filings/content/0000898430-94-000804/EX-99_1.txt https://ir.amd.com/sec-filings/content/0000898430-94-000804/...

monocasa 3y ago

About what rough area percentage (or some other metric if you think there's a clearer comparison) of a 386DX is standard cells versus hand layout?

kens 3y ago
Looking at the die, I'd say roughly 1/3 of the die is standard cell. I think some of it was standard cell but with hand layout, rather than automatic place and route. About 1/4 is the datapath, which is highly optimized. Maybe 10% is the microcode ROM.

johnklos 3y ago

Every time I see something new on righto.com, I get excited! I get to learn :D Thank you so much, both for constantly sharing what you know and for preserving what's one of the most interesting times in the evolution of computing.

RetroTechie 3y ago
+1 What I like most about these articles, is that it shows how messy even high-tech can be: All the details in fabrication techniques (and its effect on what logic designers can/can't do), some opcodes removed to make room on the die for a bugfix (?, see note 26), etc etc. "Ultimately all digital electronics is analog". The business mistakes, and lucky recoveries. Keep up the good work, Ken! (btw you typo'd an "8" and "6" in note 25 :-)

srejk 3y ago

Great post! Any idea how the turbo button worked? It seems like, given the transistor difference between the 8086 and 386, that merely decreasing the clock frequency wouldn't be enough?

kens 3y ago
Yes, I think the turbo button just changes the clock speed. The 386 was designed to be binary compatible with the 8086, but normally ran faster.
irdc 3y ago
This was often done by introducing wait states, so the processor would slow down while accessing main memory.
- sounds 3y ago
  I did some sleuthing to try to figure out what part of computing history this could refer to. - Maybe because one could lower the "wait states" BIOS setting on PCs, and this became a selling point and was marketed? https://retrocomputing.stackexchange.com/questions/9779 https://retrocomputing.stackexchange.com/questions/9779 https://retrocomputing.stackexchange.com/questions/18333 https://retrocomputing.stackexchange.com/questions/18333 Note: it is often perceived that the CPU with more "wait states" was slower. But the above links point out how often the opposite is true. - The Apple II era was a very different world. The CPU was relatively slower than the RAM. https://retrocomputing.stackexchange.com/questions/23541 https://retrocomputing.stackexchange.com/questions/23541
fsckboy 3y ago
the lack-of-turbo button was included to enhance compatibility with older software that using timing tricks that relied on the clockspeeds of the older generations of processors. Those older processors would not have used the enhanced features of the new processors, just the backward compatible features. Turbo was a motherboard OEM feature, not a 386 feature. Otherwise, there was no reason not to run "turbo"
rasz 3y ago

Stratoscope 3y ago

Great article as always! One nit: > ..."tapeout", when the chip data is sent on magnetic tape to the mask fabrication company. That's roughly true in a temporal sense, but it's not where the term "tapeout" comes from. They could have shipped the data on a Winchester disk, and the event would still be called tapeout. In the earlier days of printed circuit board (PCB) manufacturing, you would literally "tape out" your circuit manually with black tape on a white board, typically in an enlarged form. "Tapeout" came to mean the point in time when you finished taping out your circuit and it was ready to be sent to be photographed and reduced and boards manufactured from the layout. There wasn't even any "data" involved here, magnetic or otherwise. Just a physical art board with tape on it. Wikipedia has a pretty good article on this: https://en.wikipedia.org/wiki/Tape-out https://en.wikipedia.org/wiki/Tape-out And for the young'uns who are wondering "what the heck is a Winchester disk?" https://www.pcmag.com/encyclopedia/term/winchester-disk https://www.pcmag.com/encyclopedia/term/winchester-disk I taped out my first printed circuit board as a third-grader sometime around 1960 and shared the story here: https://news.ycombinator.com/item?id=32116169 https://news.ycombinator.com/item?id=32116169

userbinator 3y ago

Thanks for getting to the bottom of the doubt! The SL die photo seems to really show the differences in density that careful layout can produce; one wouldn't think that bus/memory controllers are of the same complexity as the CPU itself, but due to being entirely standard cells, they are almost the same size as the CPU.

rasz 3y ago

Sadly Computerworld 'Intel backs off 80386 claims but denies chip recast needed (1986)' article was devoid of technical details :( Do you have more detailed information about what were the main issues with multiple OSes in Protected Mode? Was it implementation bug or fundamental architectural problems? Do you know by any chance why did Intel miss POPF trap in Protected Mode? https://devblogs.microsoft.com/oldnewthing/20160411-00/?p=93281 https://devblogs.microsoft.com/oldnewthing/20160411-00/?p=93... https://docs.oracle.com/en/virtualization/virtualbox/6.0/admin/swvirt-details.html https://docs.oracle.com/en/virtualization/virtualbox/6.0/adm... https://www.felixcloutier.com/x86/popf:popfd:popfq https://www.felixcloutier.com/x86/popf:popfd:popfq Pentium Virtual Mode Extension (VME) and its Protected Mode Virtual Interrupts (PVI) solve performance burden of trapping, but despite being named _Protected Mode_ Virtual Interrupts this works only in V86 mode leaving Protected with this bug: "The protected-mode virtual-interrupt feature — enabled by setting CR4.PVI — affects the CLI and STI instructions in the same manner as the virtual-8086 mode extensions. POPF, however, is not affected by CR4.PVI" They even planned to patent PVI this in ~1992 https://patents.google.com/patent/GB2259794A/en https://patents.google.com/patent/GB2259794A/en and clearly knew about popf pitfalls back then. Could this be what people in Computerworld article were complaining about? I dont understand how Intel not fixed it at all to this day. Btw I find it funny and weird that Intel was lawyering around all the way in 1998 trying to suppress any knowledge of Virtual Mode Extension! Dr. Dobb's 'VME: Coming Out of the Cold' https://web.archive.org/web/20001217233100/http://www.rcollins.org/ddj/May98/May98.html https://web.archive.org/web/20001217233100/http://www.rcolli...