For SIMD kernels that do "general-purpose computation" like formatting strings, parsing documents, or entropy encoding and decoding, it's difficult to use varia

For SIMD kernels that do "general-purpose computation" like formatting strings, parsing documents, or entropy encoding and decoding, it's difficult to use variable-length vector extensions, and ultimately these sorts of things written for these targets are likely to branch at runtime based on the actual width reported by the CPU. One of the most important operations for this sort of thing, TBLQ, doesn't even exist in SVE prior to SVE2.1 published ~1 year ago, so parser devs targeting aarch64 can safely target NEON until SVE2.1 lands in the hardware they care about.