This FUD keeps popping up every now and again. Yes, compressed instructions rely on variable size opcodes. No, it isn't like x86 where it's really complex for

This FUD keeps popping up every now and again. Yes, compressed instructions rely on variable size opcodes. No, it isn't like x86 where it's really complex for the decoder to know where instructions start and end. It has been designed to avoid that. As for actual implementations, every server chip that's been announced so far supports them. This includes Tenstorrent Ascalon, the one with the 8-wide decoder. Higher code density means more code fits in cache, or less cache is needed (and can thus be clocked higher). It helps very high performance implementations.