3 ms·
Your comment is ambiguous, but if you’re implying that Apple does this then it’s incorrect. They just have “unified memory” (i.e. the high bandwidth SoC substra
by rajnathani 3y ago
Your comment is ambiguous, but if you’re implying that Apple does this then it’s incorrect. They just have “unified memory” (i.e. the high bandwidth SoC substrate memory).
- Moldoteck 3y agoYes, and I'm asking why not allow to add extra ram through slots as a slower cache between unified mem and ssd? And why other manufacturers are not doing this to achieve apple lvl of performanca and also allowing upgradability
- rajnathani 3y agoOne of the neighboring comments citing Intel’s HBM memory I guess does the 2-layer memory thing. The reason we probably don’t see these dual-level memory solutions is that the fast-access part of the memory of HBM is really expensive to implement on the same substrate as the SoC. For example, part of the reason why top-end GPUs are expensive (besides “pricing power in the age of AI”) is that they all have HBM memory. DDR based memories are super-cheap in comparison to implement in hardware. Also another aspect is that the SoC needs to support HBM memory, most chips of yesteryears simply have DDR<n> support only.
- cma 3y agoI thought slots don't really slow things down much and aren't the primary source of latency, isn't it more about cost and power? Adding slots back in would remove the cost and power advantages wouldn't they? And now using more SRAM to track occupancy of an extra layer of cache, or if not SRAM for that something adding more latency.