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Imagine a world where FPGAs had better performance then CPU/GPU. And we all had one as our main processor. Lots of possibilities! You could possibly "install" a

Imagine a world where FPGAs had better performance then CPU/GPU. And we all had one as our main processor. Lots of possibilities! You could possibly "install" a program in the true sense of the word, like installing a kitchen cabinet. It could have totally isolated resources. Containers would really be contained. Neural network architectures themselves could learn (not just the weights).

msla 3y ago
> Imagine a world where FPGAs had better performance then CPU/GPU. Is that even theoretically possible, assuming we don't do the obvious thing and make normal CPUs slower to force it to be true? Also: > You could possibly "install" a program in the true sense of the word, like installing a kitchen cabinet. It could have totally isolated resources. Containers would really be contained. This is just hypervisors with guests, and has absolutely nothing to do with FPGAs.
- LoganDark 3y ago
  > This is just hypervisors with guests, and has absolutely nothing to do with FPGAs. It really is not. On an FPGA, additional logic does not slow down the other logic. In a hypervisor it does!
  - duskwuff 3y ago
    > On an FPGA, additional logic does not slow down the other logic. It absolutely does. As the amount of logic in a design increases, it becomes increasingly difficult (and, eventually, impossible) for a place-and-route algorithm to generate a layout which meets timing constraints.
    - nisegami 3y ago
      Maybe my understanding of FPGAs is wrong, but isn't that an issue at design-time and not an issue at run-time?
      - lstodd 3y ago
        Well if you declare that anything your router can't place can not exist then yes. But in reality - no. There's a reason why people didn't already drop everything in favor of FPGAs and it's because they don't scale (and also are horrible at thermals).
        a96 3y ago
        Also, cost. And tools.
    - LoganDark 3y ago
      Oops. I was thinking of specifically the case where each "container" was already confined to its own space on the chip, so placing/routing would happen individually. But in the general case it does make sense that more logic in the middle of some code will affect everything that has to be placed around it.
- civilitty 3y ago
  > Is that even theoretically possible, assuming we don't do the obvious thing and make normal CPUs slower to force it to be true? No. With all the space they waste being reconfigurable, the max frequency they can support at the logic element level is much lower just due to how much distance the signal has to travel without attenuating too much.
  - duskwuff 3y ago
    Less about physical space, more about propagation delays. The configurability of an FPGA doesn't come out of nowhere; it's a bunch of multiplexers and pass transistors which route signals around and control how they're processed by CLBs, and those elements all add delay, limiting Fmax.
justsomehnguy 3y ago
Congratulations, you invented modular [POTS] PBX and network switches.

msla 3y ago

> Imagine a world where FPGAs had better performance then CPU/GPU. Is that even theoretically possible, assuming we don't do the obvious thing and make normal CPUs slower to force it to be true? Also: > You could possibly "install" a program in the true sense of the word, like installing a kitchen cabinet. It could have totally isolated resources. Containers would really be contained. This is just hypervisors with guests, and has absolutely nothing to do with FPGAs.

LoganDark 3y ago
> This is just hypervisors with guests, and has absolutely nothing to do with FPGAs. It really is not. On an FPGA, additional logic does not slow down the other logic. In a hypervisor it does!
- duskwuff 3y ago
  > On an FPGA, additional logic does not slow down the other logic. It absolutely does. As the amount of logic in a design increases, it becomes increasingly difficult (and, eventually, impossible) for a place-and-route algorithm to generate a layout which meets timing constraints.
  - nisegami 3y ago
    Maybe my understanding of FPGAs is wrong, but isn't that an issue at design-time and not an issue at run-time?
    - lstodd 3y ago
      Well if you declare that anything your router can't place can not exist then yes. But in reality - no. There's a reason why people didn't already drop everything in favor of FPGAs and it's because they don't scale (and also are horrible at thermals).
      - a96 3y ago
        Also, cost. And tools.
  - LoganDark 3y ago
    Oops. I was thinking of specifically the case where each "container" was already confined to its own space on the chip, so placing/routing would happen individually. But in the general case it does make sense that more logic in the middle of some code will affect everything that has to be placed around it.
civilitty 3y ago
> Is that even theoretically possible, assuming we don't do the obvious thing and make normal CPUs slower to force it to be true? No. With all the space they waste being reconfigurable, the max frequency they can support at the logic element level is much lower just due to how much distance the signal has to travel without attenuating too much.
- duskwuff 3y ago
  Less about physical space, more about propagation delays. The configurability of an FPGA doesn't come out of nowhere; it's a bunch of multiplexers and pass transistors which route signals around and control how they're processed by CLBs, and those elements all add delay, limiting Fmax.

justsomehnguy 3y ago

Congratulations, you invented modular [POTS] PBX and network switches.