3 ms·
Not a CPU designer by any means, but I imagine mundane RMW ops on regular registers, like the second half of LUI+ADD, are easier to handle than a flags register
by mananaysiempre 3y ago
Not a CPU designer by any means, but I imagine mundane RMW ops on regular registers, like the second half of LUI+ADD, are easier to handle than a flags register that is implicitly threaded through the entirety of the program. So the argument against the CMP+BEQ design could be all the other possible occurrences of BEQ the architecture is required to handle, not the one that can be fused (or not) with a preceding instruction.
(Then RISC-V goes and introduces a flags register for floating-point ops...)
- deleted 3y ago[deleted]
- dzaima 3y agoA flags register is "threaded through the entirety of the program" just as much as all other registers. Though lui+add does have the benefit that the add should write over the lui result, whereas cmp+branch needs to both update the flags & do the branch (but x86 cores should have no problem with that, as every single add & xor & and & inc & load & etc also write to flags already). Flags for FP aren't particularly nice, but without them you just can't implement <fenv.h> which software may be expecting. (of course using a global flag for semantics isn't particularly nice either, but hey that's what's been standardized in C)