Integrating an FPGA with the actual front-end and register files seems so you can invoke it synchronously, with fast instructions at low latency, seems neat but

Integrating an FPGA with the actual front-end and register files seems so you can invoke it synchronously, with fast instructions at low latency, seems neat but rather complicated. As for an FPGA asynchronously accessing application memory, I tentatively expect CXL with some shared virtual memory trickery to succeed in this space, at least in a couple years when the dust hopefully settles, and then you can do whatever you want.