Its an eye-raising decision for sure, but this is literally Microchip's most recent MPU design. Microchip has Cortex-A5 and Cortex-A7 chips available for those

Its an eye-raising decision for sure, but this is literally Microchip's most recent MPU design. Microchip has Cortex-A5 and Cortex-A7 chips available for those who want them. But the most recently released chip is in fact SAM9X60. My assumption is that Microchip has a large customer who is demanding as perfect of a match to some 20+ year old design, and Microchip is more than happy to produce this ancient design for them. ARM926EJ-S gives us a big hint: J for Jazelle. If some customer has some old Embedded Jazelle/Java code that they haven't bothered to update in the last 20 years, perhaps its easier for Microchip to just keep making ARM926EJ-S rather than forcing them to upgrade to Cortex-A5 or A7 (which although newer... these newer chips have all gotten rid of Jazelle / hardware execution of Java code). ------------------- Code-wise, there's probably a lot of downsides. But electrically speaking, the SAM9X60 is an extremely well designed BGA with well-matched VCC/GND pins that has a 4-layer reference design. (Or at least: the SiP version SAM9X60-D1G). In a world where 6, 8, or 10-layer designs are commonly needed to route DDR-RAM, seeing a 4-layer board reference design is pretty nuts (https://ww1.microchip.com/downloads/en/Appnotes/AN_3311_SAM9X60-Hardware-Design-Considerations_00003311a.pdf https://ww1.microchip.com/downloads/en/Appnotes/AN_3311_SAM9... as well as the 4-layer DDR2 layout that was validated on: https://ww1.microchip.com/downloads/en/Appnotes/AN_3310_Connecting-SDR-and-DDR-Memories-to-SAM9X60_00003310a.pdf https://ww1.microchip.com/downloads/en/Appnotes/AN_3310_Conn...). Designing an 14mm x 14mm BGA223 that can be routed on a 4-layer board is no small feat. And therefore, this is probably one of the easiest BGAs to layout for a beginner, and lowers your PCB production costs.