5 ms·
If this write-up has a target audience, I'm in it. However... the graphics are pulled directly off the ARM website[1] and IMO, having an automatic pop-up on th
by schaefer 3y ago
If this write-up has a target audience, I'm in it.
However... the graphics are pulled directly off the ARM website[1] and IMO, having an automatic pop-up on the page that says "talk to us about sales" subverts the good will that could other wise have been generated.
Finally, anyone who tries to tell me that A53 is "high-end" in 2023 will get some side-eye.
[1]: https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a53 https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-...
- dragontamer 3y ago> Finally, anyone who tries to tell me that A53 is "high-end" in 2023 will get some side-eye. You know that Microchip's SAM9x60 from 2020 is running ARM926EJ-S (aka: ARMv5) with J for Jazelle instructions, right? "Embedded" world moves slower than consumer world. ARM Cortex-A53 is high-end for embedded. This is a world where 8051 and Z80 chips are still being made. ---------- I feel like a lot of MPUs released in the last 2 years (i.MX from NXP, STM32MP1 and soon-to-be-released MP2, etc. etc.) are in the ARM-Cortex A7-ish tier.
- RicoElectrico 3y agoAny advantage to use ARMv5 at this point? Knowing that ARM designs a whole spectrum of processors over performance/power/area triangle, has there really been no alternative?
- dragontamer 3y agoIts an eye-raising decision for sure, but this is literally Microchip's most recent MPU design. Microchip has Cortex-A5 and Cortex-A7 chips available for those who want them. But the most recently released chip is in fact SAM9X60. My assumption is that Microchip has a large customer who is demanding as perfect of a match to some 20+ year old design, and Microchip is more than happy to produce this ancient design for them. ARM926EJ-S gives us a big hint: J for Jazelle. If some customer has some old Embedded Jazelle/Java code that they haven't bothered to update in the last 20 years, perhaps its easier for Microchip to just keep making ARM926EJ-S rather than forcing them to upgrade to Cortex-A5 or A7 (which although newer... these newer chips have all gotten rid of Jazelle / hardware execution of Java code). ------------------- Code-wise, there's probably a lot of downsides. But electrically speaking, the SAM9X60 is an extremely well designed BGA with well-matched VCC/GND pins that has a 4-layer reference design. (Or at least: the SiP version SAM9X60-D1G). In a world where 6, 8, or 10-layer designs are commonly needed to route DDR-RAM, seeing a 4-layer board reference design is pretty nuts (https://ww1.microchip.com/downloads/en/Appnotes/AN_3311_SAM9X60-Hardware-Design-Considerations_00003311a.pdf https://ww1.microchip.com/downloads/en/Appnotes/AN_3311_SAM9... as well as the 4-layer DDR2 layout that was validated on: https://ww1.microchip.com/downloads/en/Appnotes/AN_3310_Connecting-SDR-and-DDR-Memories-to-SAM9X60_00003310a.pdf https://ww1.microchip.com/downloads/en/Appnotes/AN_3310_Conn...). Designing an 14mm x 14mm BGA223 that can be routed on a 4-layer board is no small feat. And therefore, this is probably one of the easiest BGAs to layout for a beginner, and lowers your PCB production costs.
- IvanMilatForPM 3y ago[dead]