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AVX10.1 is just Sapphire Rapids' AVX-512 renamed, so arguably SPR (and early Alder Lake) already support AVX10.1, just without declaring the relevant CPUID bits
by RaisingSpear 3y ago
AVX10.1 is just Sapphire Rapids' AVX-512 renamed, so arguably SPR (and early Alder Lake) already support AVX10.1, just without declaring the relevant CPUID bits.
Client support depends on E-cores supporting it, and Intel have specified that they'll start with AVX10.2. I don't believe that any core has been announced with AVX10.2 support yet, and we the latest we know is Lunar Lake's ISA support.
- adrian_b 3y agoAVX10.1 is just Granite Rapids' AVX-512 renamed. Granite Rapids has a few extra AVX-512 instructions (including those added by Tiger Lake, but omitted in Sapphire Rapids and Alder Lake), so Sapphire Rapids does not support all of AVX10.1. Therefore neither Sapphire Rapids nor Emerald Rapids may turn on the AVX10 CPUID bits. Nevertheless, the differences between the AVX-512 instruction sets of Granite Rapids and Sapphire Rapids are small and of little importance.
- RaisingSpear 3y agoAre you sure? I just checked Intel's manual, and nothing above Sapphire Rapids is listed in AVX10.1: https://files.catbox.moe/23ty0y.png https://files.catbox.moe/23ty0y.png I couldn't find any new AVX* instructions added to Granite Rapids (I see PREFETCHI and some AMX additions, neither of which fall under the AVX category), and VP2INTERSECT isn't listed under AVX10 or Granite Rapids.