Yes, and the way I understood the article is that the problem--not for the next generation of chips but two generations down the line--is that cog architecture

Yes, and the way I understood the article is that the problem--not for the next generation of chips but two generations down the line--is that cog architecture scales up to 10s or 100s of processors but not thousands due to synchronization delay. That I believe is what David Ungar is attempting to address in his research.