3 ms·
Chip IP is usually encrypted verilog. Your EDA tools compile it in a secure enclave, basically. You have no real options to modify it.
by pclmulqdq 3y ago
Chip IP is usually encrypted verilog. Your EDA tools compile it in a secure enclave, basically. You have no real options to modify it.
- monocasa 3y agoWell, encrypted OASIS these days for something like a higher perf CPU core, but close enough for the point you were making.
- pclmulqdq 3y agoYeah, for hard layouts that the vendor has already done, that is true. Either way, it's transferred encrypted and protected so you can't screw with it.