> True, but when making an OS, assembly code is an incredibly small part of it. A few comments up this thread i briefly mentioned r/xv6 entry.S, so here’s what

> True, but when making an OS, assembly code is an incredibly small part of it. A few comments up this thread i briefly mentioned r/xv6 entry.S, so here’s what i meant: rv64: https://github.com/mit-pdos/xv6-riscv/blob/riscv/kernel/entry.S https://github.com/mit-pdos/xv6-riscv/blob/riscv/kernel/entr... amd64: https://github.com/dancrossnyc/rxv64/blob/main/kernel/src/entry.S https://github.com/dancrossnyc/rxv64/blob/main/kernel/src/en... > You basically need to run a few instructions to put the processor in the right mode, and you need ONE line of assembly code (often inline C) to allow usermode to call supervisor mode. Right… Please see above. Also, in riscv land we have machine, supervisor and user modes, with hypervisor mode being in the works. > When choosing an architecture for a learning OS, I think other factors would dominate, like availability of hardware (many people have a PC already, saving them $100-$200 on RISC-V hardware). yet, MIT PDOS thinks Fabrice Bellard’s ubiquitous qemu is a better, cheaper and more forgiving starting point, although i personally prefer to spend a few bucks on something as absurdly cheap and cool as kendryte k210/k510 SoC and enjoy the real deal. > Intel hate keeping tech is irrelevant [I don’t care] Yes, it’s just you. Also, it runs Minix.