Well... our ARM cores use more standard tooling. I sort of detest System Verilog, but I detest it a lot less than Rocket/Chisel. And as annoying as it is to w

Well... our ARM cores use more standard tooling. I sort of detest System Verilog, but I detest it a lot less than Rocket/Chisel. And as annoying as it is to write a big check to ARM, at least you can hire people who know how to use your IP. It probably wasn't obvious from my earlier comment, but I was comparing SiFive to ARM and then I was comparing SiFive with other RISC-V IP vendors (and open source projects.)