Actually, it isn't. I've implemented an IRQ level like system on Intel Architecture, and the operating system concept really doesn't match the processor's and

Actually, it isn't. I've implemented an IRQ level like system on Intel Architecture, and the operating system concept really doesn't match the processor's and interrupt controller's architectures very well at all until local APICs enter into the picture. Without a local APIC, one has to do tricks like re-issue interrupts with INT instructions in order to implement the NT interrupt model. The IRQ level concept may have antecedents in earlier systems from the 1980s, but it does not originate with the Intel-based Personal Computer AT architecture of the time, with its dual 8259s, EOIs, IF, and whatnot.