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> I often imagine an alternate future where we have 1000s of small single core chips with their own memory rather than current SMP model. it's not individual c
by paulmd 3y ago
> I often imagine an alternate future where we have 1000s of small single core chips with their own memory rather than current SMP model.
it's not individual chips but that's basically what GPUs or systolic processor arrays (adapteva epiphany) are like, in net effect. every core gets some memory/scratchpad to work, and there is a giant shared memory.
- paulmd 3y agohere's the paper on the adapteva epiphany btw, never thought about it in those exact terms but it actually does seem like a bit of a spiritual successor to the transputer in some ways: https://www.parallella.org/docs/e5_1024core_soc.pdf https://www.parallella.org/docs/e5_1024core_soc.pdf https://en.wikipedia.org/wiki/Zero_ASIC https://en.wikipedia.org/wiki/Zero_ASIC The Parallela boards allow access to a small array (16 cores) on a raspberry pi-style formfactor, although it's been a number of years so it's probably fairly far behind (eg) things like NVIDIA Orin