>else it’s just a “lookup table” with precomputed outputs for every input. This is how FPGAs work. Because they need to be programable, so the LUTs are in SRAM

>else it’s just a “lookup table” with precomputed outputs for every input. This is how FPGAs work. Because they need to be programable, so the LUTs are in SRAMs inside the logic blocks. But actual custom ASICs don't use SRAM, as SRAM has higher area and power cost than logic.