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Another proof that Linus is not always right. There were many folks who just blindly regurgitated AVX 512 is evil, without even actually knowing a thing about i

Another proof that Linus is not always right. There were many folks who just blindly regurgitated AVX 512 is evil, without even actually knowing a thing about it.

wtallis 3y ago
> Another proof that Linus is not always right. No, this is just a case of the right answer changing over time, as good AVX-512 implementations became available, long after its introduction. And nothing in this article even comes close to addressing the main concern with the early AVX-512 implementation: the significant performance penalty it imposes on other code due to Skylake's slow power state transitions. Microbenchmarks like this made AVX-512 look good even on Skylake, because they ignore the broader effects.
- nwallin 3y ago
  To add to your point, this benchmark would not have run on Skylake at all. It uses the _mm512_maskz_compress_epi8 instruction, which wasn't introduced until Ice Lake.
- SomeoneFromCA 3y ago
  So your point he is indeed always right? Or was right in that particular case (he was not)? If you remember, Linux complained not about the particular implementation of AVX-512, but the concept itself. It is also kinda looks ignorant of him (and anyone else who thinks the same way) to believe that AVX-512 is only about 512 or it has no potential, being a just simply better SIMD ISA compared to AVX1/2. What he did he just expressed himself in his trademark silly edgy maximalist way. It is an absolute pleasure to work with, gives great performance boost, and he should have more careful with his statements.
  - a1369209993 3y ago
    > So your point he is indeed always right? No, their point is that this does not refute said hypothetical claim. That is, their point is that it is not, as you claimed: > Another proof that Linus is not always right. (I don't know if their point is correct, but it's of the form "your argument against X is invalid", not "X is correct".)
camel-cdr 3y ago
It kinda depends, I wouldn't be surprises, if properly optimized avx2 could get the same performance, since it looks like the operation is memory bottlenecked.
- SomeoneFromCA 3y ago
  Nah, AVX512 is more performant design due to the support of masking. It does not depend in fact on anything. Those who compares favorably or equally AVX2 with 512 never used either of them.
  - cyber_kinetist 3y ago
    Which is I’m really looking forward to Intel’s upcoming AVX10 / APX extensions, created to alleviate the P/E core issues they had in Alder Lake (really, what the fuck was Intel thinking back then?) It’s still inferior compared to full AVX-512 since you don’t have 512-bit wide registers, but you still have 32 256-bit registers to play with as well as the rich instruction set of AVX-512 (with all that masking and gather/scatter ops and that jazz…) so much better than AVX2. Now hearing that the upcoming Ryzen is also going with the hybrid P/E core approach I wonder if AMD is also preparing to adopt these instructions as well…
    - SomeoneFromCA 3y ago
      The thing about Alder Lake AVX 512 is that (actually was, but i still occasionally run it with AVX512 enabled, for some specific tasks) the Alder Lake is the only consumer grade CPU that supports AVX 512 FP16. It is very performant for ML tasks, not like a real GPU, obviously, but a lot, much much easier to use. Besides Intel do not gurantee compatibility AVX10 with AVX512/256.

Another proof that Linus is not always right. There were many folks who just blindly regurgitated AVX 512 is evil, without even actually knowing a thing about it.

wtallis 3y ago

> Another proof that Linus is not always right. No, this is just a case of the right answer changing over time, as good AVX-512 implementations became available, long after its introduction. And nothing in this article even comes close to addressing the main concern with the early AVX-512 implementation: the significant performance penalty it imposes on other code due to Skylake's slow power state transitions. Microbenchmarks like this made AVX-512 look good even on Skylake, because they ignore the broader effects.

nwallin 3y ago
To add to your point, this benchmark would not have run on Skylake at all. It uses the _mm512_maskz_compress_epi8 instruction, which wasn't introduced until Ice Lake.
SomeoneFromCA 3y ago
So your point he is indeed always right? Or was right in that particular case (he was not)? If you remember, Linux complained not about the particular implementation of AVX-512, but the concept itself. It is also kinda looks ignorant of him (and anyone else who thinks the same way) to believe that AVX-512 is only about 512 or it has no potential, being a just simply better SIMD ISA compared to AVX1/2. What he did he just expressed himself in his trademark silly edgy maximalist way. It is an absolute pleasure to work with, gives great performance boost, and he should have more careful with his statements.
- a1369209993 3y ago
  > So your point he is indeed always right? No, their point is that this does not refute said hypothetical claim. That is, their point is that it is not, as you claimed: > Another proof that Linus is not always right. (I don't know if their point is correct, but it's of the form "your argument against X is invalid", not "X is correct".)

camel-cdr 3y ago

It kinda depends, I wouldn't be surprises, if properly optimized avx2 could get the same performance, since it looks like the operation is memory bottlenecked.

SomeoneFromCA 3y ago
Nah, AVX512 is more performant design due to the support of masking. It does not depend in fact on anything. Those who compares favorably or equally AVX2 with 512 never used either of them.
- cyber_kinetist 3y ago
  Which is I’m really looking forward to Intel’s upcoming AVX10 / APX extensions, created to alleviate the P/E core issues they had in Alder Lake (really, what the fuck was Intel thinking back then?) It’s still inferior compared to full AVX-512 since you don’t have 512-bit wide registers, but you still have 32 256-bit registers to play with as well as the rich instruction set of AVX-512 (with all that masking and gather/scatter ops and that jazz…) so much better than AVX2. Now hearing that the upcoming Ryzen is also going with the hybrid P/E core approach I wonder if AMD is also preparing to adopt these instructions as well…
  - SomeoneFromCA 3y ago
    The thing about Alder Lake AVX 512 is that (actually was, but i still occasionally run it with AVX512 enabled, for some specific tasks) the Alder Lake is the only consumer grade CPU that supports AVX 512 FP16. It is very performant for ML tasks, not like a real GPU, obviously, but a lot, much much easier to use. Besides Intel do not gurantee compatibility AVX10 with AVX512/256.