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Here is an interview with a former vice president of research at TSMC (and later SMIC). I encourage you to read the interview in its entirety. It is illuminati
by chasil 3y ago
Here is an interview with a former vice president of research at TSMC (and later SMIC).
I encourage you to read the interview in its entirety. It is illuminating.
On the question of of bringing up a new process node:
"We all take two years to develop one generation, how come you guys can do it in one or one-and-a-half year?" And they asked if some of your customer transfer technology to you or what not? And I told him, "No," I told him that, "That's not true." I think he probably implied we steal technology from customer, the way he talk.
And I say, "I'll tell you why." I said that, "When we develop one node, basically you have some learning cycles. First, you do some simulation. And you have some idea, then you run wafers to prove that. So, you run a group of wafers according to simulation and you have some splits. The wafer runs through the fab, they come out and you measure them, you analyze them, and you try to improve and you run this again. This again, you run. So, this is learning cycle." At that time, "It takes about six learning cycle, roughly, to complete one generation." Of course, you had some short loops and not just one. I said that, "My R&D wafer in the fab run much faster than yours, because my R&D engineer works three shifts and you only work one shift. So, your R&D wafer move eight hours a day, my work/move 24-hours a day. So, my wafers go three times faster, even if you are twice smarter than me, I still beat you up." <laughter>
https://www.computerhistory.org/collections/catalog/102792671 https://www.computerhistory.org/collections/catalog/10279267...
- Arubis 3y agoThis is a significantly better read than TFA. I encourage you to submit it.
- 2muchcoffeeman 3y agoThe submitted article is written to give people with no idea what’s happening some understanding of the issues. Different audiences.
- chasil 3y agoOK, I'll submit it. https://news.ycombinator.com/item?id=37185090 https://news.ycombinator.com/item?id=37185090
- chasil 3y agoNow that doesn't make any sense; with 17 up votes, I should still be on the front page.
- arboles 3y agoWhat's illuminating about this? He's just saying his engineers work longer hours, 24 hour a day (hyperbole)
- raincole 3y agoIt's not hyperbole tho. Quite a lot people work in shifts in TSMC.
- adrian_b 3y agoA few decades ago, I have worked for some years in an European semiconductor fab. There the R&D engineers also worked in 3 shifts, to follow experimental wafer batches all day. However, most of the time the R&D engineers worked in the normal shift. By rotation, a few worked in the evening shift and even fewer worked in the night shift, typically only when it was expected that after finishing some process step it will be necessary to measure test structures on the experimental silicon wafers and make decisions about process parameters for the following process steps. So work at least partially in shifts is really expected in such an environment, because it is inefficient and costly to stop the processing of a wafer batch and wait until next morning, when an R&D engineer would come and would decide what to do with the wafers next.
- KirillPanov 3y agoWow, you completely mangled what he said. His engineers work three shifts. They aren't (necessarily) working longer hours. But they're willing to work second and third shift at times, which R&D engineers in bascially every other first-world country refuse to do. If you had a bunch of R&D engineers willing to work 16-hour days every day of the week, as long as they could sleep from midnight to 8am, you still wouldn't be able to keep up with TSMC. It isn't longer hours.
- MichaelZuo 3y agoConsidering how much fabs cost, or so all publications say, it's actually surprising for any R&D departments to not run three shifts 24/7 to maximize utilization. When 1 EUV machine setup and ready is a quarter billion dollars...