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> Plus it assumes that pointers only have 48 bits with rest are zeros (true for AMD, ARM and Intel) Except when it isn't: https://en.wikipedia.org/wiki/Intel_5
by jsheard 3y ago
> Plus it assumes that pointers only have 48 bits with rest are zeros (true for AMD, ARM and Intel)
Except when it isn't: https://en.wikipedia.org/wiki/Intel_5-level_paging https://en.wikipedia.org/wiki/Intel_5-level_paging
That's not something you're likely to run into on consumer hardware, but with JS being used on the server I wonder if/when JS engines will need to deal with that.
- aapoalas 3y agoARM also has pointer cryptography which may one day become a blocker.
- toast0 3y agoThat's probably quite some time off. As an application, you'd only get the new level of paging if you asked for it, like with PAE. And you're only going to ask for it if you need more than 256TB of address space, which seems like a rather large space to need. I guess you could have a lot of files mmaped though?
- _0w8t 3y agoWhen there are more bits in a pointer than NaN 52 bits allows, the trick is to replace pointers with indexes from the start of JS heap. This is not efficient even with arrangement like having heap aligned, say, on 4GB or even more granular address so to get the full pointer one just use bit operation, not an add. But if one wants efficiency, then make sure that types in the code is stable and JIT will generate type-specific code.