2 ms·
At least when I last read it a couple years ago, Intel's optimization manual recommends certain code layouts. For example in the absence of better information a
by wongarsu 3y ago
At least when I last read it a couple years ago, Intel's optimization manual recommends certain code layouts. For example in the absence of better information a conditional jump backwards would be predicted as true (because that's what loops look like) while a jump forward is seen as less likely to happen (error conditions and else branches look like that).
Not sure how consistent this is across architectures, and how useful it still is. But at least it used to be a thing
- kragen 3y agopretty common but not, as i thought, universal since stretch https://en.wikipedia.org/wiki/Branch_predictor#Static_branch_prediction https://en.wikipedia.org/wiki/Branch_predictor#Static_branch... but the only simpler approach is 'predict not taken' which in a sense is what a cortex-m0 does