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> "The planned fab ... [is expected to produce] wafers on TSMC’s 28/22 nanometer planar CMOS and 16/12 nanometer FinFET process technology" These are not leadi
by ablated_maquis 3y ago
> "The planned fab ... [is expected to produce] wafers on TSMC’s 28/22 nanometer planar CMOS and 16/12 nanometer FinFET process technology"
These are not leading node semiconductors that will be used for training AI. These are commodity chips that will be used in the automotive industry.