Oof on that note: at least in the example in the article, it's going to cost a TLB miss as page permissions are getting changed. So that's a page-table walk whi

Oof on that note: at least in the example in the article, it's going to cost a TLB miss as page permissions are getting changed. So that's a page-table walk which means %cr3 -> PML4 -> PDPT -> PD -> PT -> the actual address you want to access; potentially up to 5 memory accesses (6 if your system has more than 256TB of RAM and you're using 5-level paging). That being said, in a loop you'd only take this hit on the first run. You'd be back to cache misses after that.