4 ms·
A non-obvious reason for using PUSH/POP instead of a loop could be to generate as many different bus cycles as possible. We get instruction fetch, memory read,
by peterfirefly 3y ago
A non-obvious reason for using PUSH/POP instead of a loop could be to generate as many different bus cycles as possible.
We get instruction fetch, memory read, memory write, and probably idle -- and an I/O write (0F0h). We should get the idle cycles because PUSH/POP instructions are single-byte and require a little time for decoding and the 286 BIU fetched 2 bytes at a time so the instruction buffer should get full.
Maybe they wanted that on top of the delay (which is obviously there because they didn't want to use the FWAIT instruction) -- maybe some 80287 chips had internal state machines that could get confused and needed some help?
- benj111 3y agoIt /could/ be that. But I think that's an overly charitable interpretation based on the evidence. If the source code turns up with detailed comments about why it's like it is. Fine. In the absence of that, I'm not buying it.
- peterfirefly 3y agoI also don't think it is. I think it is just a short and simple delay -- each push/pop pair is only two bytes AND generates 2 word transfers AND doesn't disturb any registers. They probably had a macro or repm loop for it.
- benj111 3y agoBut why the redundant FNCLEX and io writes then? As I said, if you just had 100 push pops, fine. But it isnt, it's push pops mixed in with other seemingly redundant code.