3 ms·
Optionally enabling it does break the ARM spec. Their cores break the ARM spec in other ways too. Added instructions for AMX, new guard privilege modes, HCR_E
by monocasa 3y ago
Optionally enabling it does break the ARM spec.
Their cores break the ARM spec in other ways too. Added instructions for AMX, new guard privilege modes, HCR_EL2.E2H can't be disabled, GPRs are clobbered on WFI, etc.