Bear in mind, when silicon foundries say they have an Xnm process, nothing in that process is actually Xnm. TSMCs 2nm process does not make transistors 2nm wide

Bear in mind, when silicon foundries say they have an Xnm process, nothing in that process is actually Xnm. TSMCs 2nm process does not make transistors 2nm wide[1]. They are in fact, approximately 40-50nm wide. The process number is a marketing number, and what changes each generation is actually transistor geometry (here you'll see terms like FinFET and GAA transistor and such, plus some process improvements that cause "half" generations) [1]https://en.wikipedia.org/wiki/2_nm_process https://en.wikipedia.org/wiki/2_nm_process But yeah, the fact that latest process nodes actually increase in cost is why people say "Moore's law is dead". Performance improves, but to keep the trendline roughly exponential, many things have had to give since the late 2000s. Such as: cost per wafer, power usage for max performance etc.