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Do you realize that with pipelining, preemptive computation, multiple levels of caching, opcode optimization, NUMA, massive parallelism, and all that other stuf
by cheatercheater 15y ago
Do you realize that with pipelining, preemptive computation, multiple levels of caching, opcode optimization, NUMA, massive parallelism, and all that other stuff x86 is to hardware what Java is to hardware interrupts?
Answer: you don't because otherwise you would not have posted the above.
- Androsynth 15y agoYou're over exaggerating. You can teach students about processor theory, assembly language and C without getting into all the extra stuff. All the extra stuff is built on that foundation, and learning C helps you understand that foundation better than any other language.
- cheatercheater 15y agoThis is not "extra stuff". It is how it works. x86 was made to be simple to hand-code, not to in any way reflect the hardware. And then, decades later, new developments to it are so that it's easy to compile to. The language went through two major paradigms without either having the point of x86 reflecting the hardware it abstracts. SIMD, NUMA, pipelining and caching is exactly how processors work right now. And they're radically different to what happened before the Intel Core family of processors. This is in turn radically different to what happened before the Pentium Pro family of processors. Yet all support the same x86 instruction set. The corollary is that x86 is an abstraction. You're being ignorant if you think x86 is like the opcodes being executed after the whole caching stage has happened.