> If I read the note correctly, P-cores won't have 512-bit vector registers I don’t entirely agree. See the second graphic here: https://www.phoronix.com/news/

> If I read the note correctly, P-cores won't have 512-bit vector registers I don’t entirely agree. See the second graphic here: https://www.phoronix.com/news/Intel-AVX10 https://www.phoronix.com/news/Intel-AVX10 Mentioned above the graphic: > Part of making AVX10 suitable for both P and E cores is that the converged version has a maximum vector length of 256-bits and found with the E cores while P cores will have optional 512-bit vector use. 512-bit support will be optional, so maybe every P-core won’t have it… maybe it’ll be restricted to higher end processors? But it sounds like some will have it, or it wouldn’t be an option at all.