3 ms·
A lot of the undocumented instruction "match" bits make sense, such as POP CS at [0F]. However, it's clear that the authors of the microcode deliberately made e
by colejohnson66 3y ago
A lot of the undocumented instruction "match" bits make sense, such as POP CS at [0F]. However, it's clear that the authors of the microcode deliberately made every opcode match to some routine, as evidenced by Jcc being mirrored into the [60..6F] region, LOCK into [F1], group 2 /6 into /7, etc. It wouldn't've "cost" anything extra to make Jcc only match on its documented [70..7F] region (and others) like later processors do. What's the advantage of matching on undefined byte sequences?
Also, SALC is still technically undocumented by Intel (AMD documents it, though). It doesn't have a dedicated section in the SDM (would be in Volume 2, Chapter 4), and in the opcode map (Volume 2, Appendix A), there's a blank there. One actually has to go to Volume 3, Chapter 23 "Architecture Compatibility", Section 15 "Undefined Opcodes" (of version 080 from June) to see it mentioned. It's weird. They even call it out as SALC "when not in 64-bit mode" and that it performs "IF (CF=1), AL=FF, ELSE, AL=0", but refuse to officially document it.
- kens 3y agoThere's a reason why every 8086 opcode matches something. If an instruction didn't match anything, I think the microcode engine would spin idle and the instruction would never terminate. (You need a RNI micro-instruction to end microcode processing.) Having your processor lock up due to a bad opcode is something that the designers presumably explicitly avoided. The 6502 on the other hand, didn't take such precautions. There are opcodes that cause the internal timing state machine to sort of fall off the end, causing the CPU to lock up and even an interrupt won't rescue you. You need a RESET signal.
- greenyoda 3y agoAlso the 6800, with its famous HCF (Halt and Catch Fire) instruction: > With the advent of the MC6800 (introduced in 1974), a design flaw was discovered by programmers. Due to incomplete opcode decoding, two illegal opcodes, 0x9D and 0xDD, will cause the program counter on the processor to increment endlessly, which locks the processor until reset. Those codes have been unofficially named HCF. During the design process of the MC6802, engineers originally planned to remove this instruction, but kept it as-is for testing purposes. As a result, HCF was officially recognized as a real instruction. https://en.wikipedia.org/wiki/Halt_and_Catch_Fire_(computing) https://en.wikipedia.org/wiki/Halt_and_Catch_Fire_(computing...
- sedatk 3y agoAlso a fantastic TV series about the personal computing era of the 80's. https://www.imdb.com/title/tt2543312/ https://www.imdb.com/title/tt2543312/
- SomeRndName11 3y agoThe show is mediocre, lots of technical inaccuracies.
- mrguyorama 3y agoIt also has a lot of soap opera syndrome, where the characters are all mary sues, and constantly make new problems when there are none to be dramatic about. They are entirely unlikeable and spend all their time not name-dropping nerd bait being assholes and punishing you as a viewer for being invested in anything. The show feels like if you were supposed to take It's Always Sunny seriously, for drama. Meanwhile there just happens to be 25 years of computer history occasionally shoved into the background, that magically is the fault of the same like four people.
- watersb 3y agoHeck, MY computer literally had the infamous "Halt and Catch Fire" instruction: https://en.m.wikipedia.org/wiki/Halt_and_Catch_Fire_(computing) https://en.m.wikipedia.org/wiki/Halt_and_Catch_Fire_(computi... although by the time I got to computing, the HCF didn't actually cause conflagration. I think I recall a 1960s computer design that would poll a limited set of (magnetic core) memory addresses in its idle loop, which led to overheating in those memory elements. Boot loader for PDP-8? I don't think it was the CDC-6600...
- kiwidrew 3y agoWhen implementing the decoding in silicon, each bit you want to compare requires one or more transistors; but no transistors are required for the "don't care" bits.
- kens 3y agoSince the decoder is implemented in a PLA-style matrix, you don't save any space by omitting transistors. So that's not a motivation. Random thing: chip transistor counts usually count "transistor sites" rather than physical transistors, so the omitted transistors still show up in the transistor counts.